A New Route to Terabit Memory

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To guide the polymers to assemble themselves in a more ordered way, in the past, researchers have used lithography to first pattern the surface on which the block copolymer is deposited. Patterning the surface on the nanoscale requires a time-consuming technique known as electron-beam lithography. "To cover the area we did, which is one inch by one inch, takes a couple of months to do with e-beam lithography," says Thomas Russell, a polymer-science and engineering professor and block-copolymer pioneer at the University of Massachusetts Amherst, who led the work with Xu. "We can do it in a couple of hours."

Instead of a patterned surface, the researchers use a sapphire crystal as the substrate. When the sapphire crystal is cut at an angle and heated to 1,300 °C, its surface forms a series of sawtooth-shaped ridges. The polymer now uses the ridges as a guide to automatically line up along the ridges in a regular array, sticking straight up. "We get the patterning in the single crystal for free," Xu says.

Each cylinder is only three nanometers wide. If each was used as a bit template, the array would give 10 terabits per square inch. By changing the temperature at which the crystal is heated, the researchers can change the angle and height of the sawtooth ridges, which changes the arrangement of the cylinders. Xu says that the process should work with silicon crystals, although the researchers have not tried that yet.

"This appears to be a pretty cheap method," says Glenn Fredrickson, a chemical-engineering professor at the University of California, Santa Barbara (UCSB). "You literally cut the sapphire substrate a particular way, heat it up, and you're ready to go." Researchers at UCSB are now working on another technique in which they first create micrometers-wide wells on a surface employing conventional lithography used to make circuit chips. The block copolymer then lines up using the edges of the well as a guide.

Caroline Ross, a materials-science and engineering professor at MIT, cautions that arranging block copolymers is just one step toward making terabits-per-square-inch memory devices. People still need to work on ways to fabricate, read, and write the tiny bits that are only a few nanometers wide. Once you have self-assembled the polymer to make a scaffold, Ross says, "the transfer of that pattern into a magnetic material, and then the actual reading and writing of data at that kind of density, are far from trivial."